{"version":"1.0","provider_name":"Electronics Maker","provider_url":"https:\/\/electronicsmaker.com","author_name":"Electronics Maker","author_url":"https:\/\/electronicsmaker.com\/author\/electronics","title":"Microchip FPGAsSpeed Intelligent Edge Designs and Reduce Development Cost and Risk withTailored PolarFire\u00ae FPGA and SoCSolution Stacks - Electronics Maker","type":"rich","width":600,"height":338,"html":"<blockquote class=\"wp-embedded-content\" data-secret=\"LdTwnqElpv\"><a href=\"https:\/\/electronicsmaker.com\/microchip-fpgasspeed-intelligent-edge-designs-and-reduce-development-cost-and-risk-withtailored-polarfire-fpga-and-socsolution-stacks\">Microchip FPGAsSpeed Intelligent Edge Designs and Reduce Development Cost and Risk withTailored PolarFire\u00ae FPGA and SoCSolution Stacks<\/a><\/blockquote><iframe sandbox=\"allow-scripts\" security=\"restricted\" src=\"https:\/\/electronicsmaker.com\/microchip-fpgasspeed-intelligent-edge-designs-and-reduce-development-cost-and-risk-withtailored-polarfire-fpga-and-socsolution-stacks\/embed#?secret=LdTwnqElpv\" width=\"600\" height=\"338\" title=\"&#8220;Microchip FPGAsSpeed Intelligent Edge Designs and Reduce Development Cost and Risk withTailored PolarFire\u00ae FPGA and SoCSolution Stacks&#8221; &#8212; Electronics Maker\" data-secret=\"LdTwnqElpv\" frameborder=\"0\" marginwidth=\"0\" marginheight=\"0\" scrolling=\"no\" class=\"wp-embedded-content\"><\/iframe><script type=\"text\/javascript\">\n\/* <![CDATA[ *\/\n\/*! This file is auto-generated *\/\n!function(d,l){\"use strict\";l.querySelector&&d.addEventListener&&\"undefined\"!=typeof URL&&(d.wp=d.wp||{},d.wp.receiveEmbedMessage||(d.wp.receiveEmbedMessage=function(e){var t=e.data;if((t||t.secret||t.message||t.value)&&!\/[^a-zA-Z0-9]\/.test(t.secret)){for(var s,r,n,a=l.querySelectorAll('iframe[data-secret=\"'+t.secret+'\"]'),o=l.querySelectorAll('blockquote[data-secret=\"'+t.secret+'\"]'),c=new RegExp(\"^https?:$\",\"i\"),i=0;i<o.length;i++)o[i].style.display=\"none\";for(i=0;i<a.length;i++)s=a[i],e.source===s.contentWindow&&(s.removeAttribute(\"style\"),\"height\"===t.message?(1e3<(r=parseInt(t.value,10))?r=1e3:~~r<200&&(r=200),s.height=r):\"link\"===t.message&&(r=new URL(s.getAttribute(\"src\")),n=new URL(t.value),c.test(n.protocol))&&n.host===r.host&&l.activeElement===s&&(d.top.location.href=t.value))}},d.addEventListener(\"message\",d.wp.receiveEmbedMessage,!1),l.addEventListener(\"DOMContentLoaded\",function(){for(var e,t,s=l.querySelectorAll(\"iframe.wp-embedded-content\"),r=0;r<s.length;r++)(t=(e=s[r]).getAttribute(\"data-secret\"))||(t=Math.random().toString(36).substring(2,12),e.src+=\"#?secret=\"+t,e.setAttribute(\"data-secret\",t)),e.contentWindow.postMessage({message:\"ready\",secret:t},\"*\")},!1)))}(window,document);\n\/* ]]> *\/\n<\/script>\n","thumbnail_url":"https:\/\/electronicsmaker.com\/wp-content\/uploads\/2023\/09\/29th-Sep-GR-23-087969-230830-FPGA-PR-Industrial-Edge-9x5-1.jpg","thumbnail_width":600,"thumbnail_height":333,"description":"Ten collections\u2014spanningthe industrial and communications sectors and smart embedded vision, motor control and optical access technologies\u2014feature IP, reference designs, development kits, application notes, demo guides and more September 29,2023\u2013Designing systems for the intelligent edge has never been more difficult. Market windows are shrinking, the costs and risks of new designs are rising, thermal constraints and [&hellip;]"}